Engineer Trainees Recruitment for Graduates
Unique one year full-time Internship opportunity for II year MTech/ ME/ MS students
VLSI DigitalEngineering,.Logic Design,RTL Design,Implementation,Verification & DFT .Physical Design,Physical Placement &Routing, FunctionalEquivalence, TimingClosure and DesignRule Check VLSI AnalogEngineering .
Analog Design Analog circuit design,Spice simulation andVerilog A modeling .Custom Layout Design Custom layout designof high performanceAnalog Circuits,Layout verification Embedded SystemEngineering .Embedded System Design HW Design, PlatformEngineering, SiliconValidation, Firmware/Drivers/ Multimedia/Application developmentfor Mobile, Wearable and IOT systems.
Software Testing Testing, Automation & QAfor Embedded Software and Systems in core domains
4-6 months of company sponsored
Knowledge-intensive, industry-oriented full-time training at VEDA IIT
1(One year Internship for PG students includes above training)
Apply at www.vedaiit.org
A DD of Rs. 300/- drawn in favour of Veda Institute of Information Technology Pvt. Ltd., payable at Hyderabad, to reach by 22n.. Jun 2016
Test Eligibility: ECE/EEE/CSE in B.Tech/ M.Tech Date & Time
Prelim. Approved Candidates with hall tickets 25/06/16, 9 AM to 10 AM
Plot No. 90, Road No. 2, Banjara Hills, Hyderabad 500034, Mob: 9989928276Ph: 040 - 43929999,
e-mail: careers@vedaiit.com, web: www.vedaiit.org
CIN: U72200TG1997PTC027954®
Main Short-listed candidates in Prelim 25/06/16, 4 PM to 6 PM
Interview Short-listed candidates in Main 26, 27 & 28 Jun’16
